Changes

8255

53 bytes removed, 29 March
/* PPI Control */
Bit 7 SF Must be "0" in this case
[[File:Intel 8255A - BSR control word format8255 Control0.jpgpng]]
=== PPI Control with Bit7=1 ===
* In the CPC only Bit 4 is of interest, all other bits are always having the same value. In order to write to the PSG sound registers, a value of 82h must be written to this register. In order to read from the keyboard (through PSG register 0Eh), a value of 92h must be written to this register.
[[File:Intel 8255A - IO modes control word format8255 Control1.jpgpng]]
== Group Modes ==
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