Changes

FPGAmstrad

21 bytes added, 15:29, 20 July 2011
/* First schematic : Z80+RAM+ROM */
=== Minimal Amstrad Architecture : Build your own Z80 Amstrad Computer ===
I explain here my first great experiment, having Amstrad saying hello :)
==== First schematic  : Z80+RAM+ROM ====Z80 can address from 0x0000 to 0xFFFF
RAM is Z80 can address from 0x0000 to 0xFFFF.
You have lower and upper ROM, so starting at address RAM is from 0x0000 you put OS464to 0xFFFF.ROM, and at address xC000 you put BASIC1-0.ROM
When Z80 do READ MEMORYYou have lower and upper ROM, so starting at address 0x0000 you put OS464.ROM, and at address xC000 you read put BASIC1-0.ROM.
*When Z80 do READ MEMORY, you read ROM *When Z80 do WRITE MEMORY, you write RAM*When Z80 do WRITE IO, you do nothing *When Z80 do READ IO, you response it DATA=0x00
When Z80 do WRITE IO, you do nothingrun this schematic on FPGA, RAM change !
When Z80 do READ IO, you response it DATA=0x00
 
If you run this schematics on FPGA, RAM change !
==== Second schematic RAM+VGA ====
With JavaCPC, when you do a snapshoot, and hex edit result file, you see RAM content starting at a certain address.
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