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FPGAmstrad

2,258 bytes removed, 19:05, 12 February 2017
/* Effort done */
In r005.8.7, arnoldemu testbench "cpctest" is OK
In r005.8.14 version, using default mode "MEM_wr:quick", is OK. ==== TODO : Vadjust lines ====[http://www.6502.org/users/andre/hwinfo/crtc/crtc.html CRTC operation] Only R5 still needs to be explained. To allow a finer adjustment of the screen length than by the number of character lines (R4), R5 adds a number of blank scanlines at the end of the screen timing.  Vadjust is adding lines at end of v_counter, so after V-SYNC. So it is adding a black line. Question : are all Vadjust line black ones ? In r005.8.12, -LittleOne demo raster arrives one line too late, and prehistoric And Prehistorik II seems hiding line one line too late resulting a pixel-garbage line. This same pixel-garbage line are visible in somes demo, like Blocus, Batman Forever (several times one pixel-garbage line) and battro (10 following pixel-garbage lines in this last one : palette rotating problem ?) Some hypothesis :* VRAM is not writing pixels at this moment, resulting on a "not newly written line" (badly out of DISP)* palette offset is badly shifted, palette "masked-line" coming just after data "not newly written line" (but here "masked-line" is about DISP that is to say data... so problem seems here between VRAM and VRAM_palette (to cross with -LittleOne raster problem)) ?* bad HSYNC interrupt* bad v_counter range* instruction timing problem* "maStore = (maStore + reg[1]) & 0x3fff;" VS "LineCounter = (LineCounter + 1) & 0x7f;" invariant to check. ===== TODO : rupture =====[http://www.cpcwiki.eu/forum/programming/rupture/msg111383/#msg111383 forum : rupture] => CPC_Display.pdf by arnoldemu In some games, we show one strange line, it's a rupture badly calibrated. ===== DONE : RVDisp trigger =====This instruction is false : vertical_counter_vCC<RVDispRVDisp cannot be compared to another value using greater-than or lower-than operator... only equal operator is tolerated. Blocus demo have part of screen lighting strangly. I have to recheck each CRTC register comparaison (I think it is the last one suffering like this) ===== TODO : CRTC reg buffer =====Somes reg are bufferized while Vcc!=0..running fine. ?
===== TODO : arnoldemu testbench - crtctest =====
Have to migrate source-code repository from renaudhelias github to mist-devel github. And also update each url in head of source-code files...
=== TODO : PPI ===Problematic here : Keyboard detection versus VSYNC signal (versus interrupt cycle).
==== DONE : A better PIO ====
Overclocked at 16MHz.
 
==== TODO : CRTC clock/GA clock ====
CTRC has sure a clock. GA shall have a clock as it contains the r52 counter. r52 seems a consequence of CRTC VHSYNC, but in my last experimentations, I deduce that VSYNC and Z80_INT signal have to be fires at the same time... damn.
=== TODO : a better border heuristic ===
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