Changes
/* TODO : PPI clock */
Yamaha clock (YM2149_linmix_AmstradStereo.vhd) is used only for "sound algorithm", not for setting/getting registers (registers are set using "BDIR BC2 BC1" wires), so I have to overclock the setting/getting register clock to simulate the original behaviour...
==== TODO DONE : PPI clock ====
PPI in original schematic does not have clock ! So I have to overclock this one to simulate the original behaviour...
Overclocked at 16MHz.
==== TODO : CRTC clock/GA clock ====
CTRC has sure a clock. GA shall have a clock as it contains the r52 counter. r52 seems a consequence of CRTC VHSYNC, but in my last experimentations, I deduce that VSYNC and Z80_INT signal have to be fires at the same time... damn.
