Changes
/* Agile method */
Real Amstrad use buffer memory in front of each address and data access, and real z80 is clock low state active. Normally if you follow datasheet of z80 you know how to map memory following CU comportment. Or you do as Amstrad, saying that z80 CU sucks, I create my own sequencer, managing all my memories access, alternating CRTC work and z80 work with little synchronization, insert by the way more pixels that can support my small CRTC...
=== RAM dump ===
A starter kit that contain a RAM component can dump it.
During power is on you can :
-programming FPGA with a program/schematics done for filling RAM
-programming FPGA with a program/schematics done for using RAM
-programming FPGA with a program/schematics done for dumping RAM
My own made program do it with poor serial port, so for dumping all RAM content it take about 3 hours, and for dumping Amstrad RAM part it is about 15 minutes.
=== FPGA internal RAM size ===
It's to know that a FPGA chip contain 96KB internal RAM so you can't insert a dsk inside. This internal RAM is already used in part be T80 (z80 from opencores), the soundchip, and RAM asynchronous (RAM with two different speed one for writing another for reading) that I use for VGA mode.
=== VHDL components size ===
T80 (z80 processor) take 100kgates
Yamaha sound chip (from fpgaarcade) take 50kgates
InterruptGenerator + VGA mode take 50kgates
Bootloader (for standalone) take about 120kgates (FAT32 protocol, SPI protocol, DSK protocol)
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