Changes

== Technical ==

Connects between Z80 CPU and mainboard. I/O Ports for AMSSIO v1,v2,v3 are:

Observe that the baudrate CLK sources differ for v1,v2,v3. In v3 the CLK is fixed, v1/v2 have different jumper-selectable CLKs. And, the photo shows a different CLK crystal than the schematic. So, don't expect different AMSSIOs to be compatible with each other.

AMSSIO-II is a newer version, using a 16C850 instead of the MC6850. Aside from the schematic (see below), there is no documentation or source code for AMSSIO-II. I/O base address can be FBE0h or FBF0h (jumper-selectable).

== Software ==