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Emulators

61 bytes added, 18 April
/* Z80 CPU */
*[https://www.cpc-power.com/index.php?page=detail&num=298 Arkanoid (using Z80 Interrupt Mode 2)] [https://www.cpc-power.com/index.php?page=detail&num=427 L'anneau de Zengara (using Z80 register R)] [https://www.cpc-power.com/index.php?page=detail&num=1299 Light Corridor (Z80 useless instruction prefixes)] [https://www.cpc-power.com/index.php?page=detail&num=735 Dogsbody (accessing non-standard I/O ports)]
*[https://wikiti.brandonw.net/?title=Z80_Instruction_Set Z80 instruction set] [https://zx-pk.ru/attachment.php?attachmentid=2989&d=1143656567 Z80 MEMPTR (aka WZ) internal register] [https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags Even weirder Z80 behaviour] [https://zxe.io/software/Z80/documentation/latest/Thanks.html To get to the bottom of it] [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/z80-cpu-nmos-or-cmos/ Z80 is always NMOS on CPC and Plus] How the Z80 behaves
*[https://floooh.github.io/2021/12/06/z80-instruction-timing.html Z80 T-state timings] [https://floooh.github.io/2021/12/17/cycle-stepped-z80.html] [https://baltazarstudios.com/zilog-z80-undocumented-behavior/ Other source about T-state timings] Ultra accurate timing behaviour [https://www.cpc-power.com/cpcarchives/index.php?page=articles&num=48 I/O port allocation] [https://www.grimware.org/doku.php/documentations/devices/gatearray RAM/ROM mapping] Technical documentation
== Diagnostics ==
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