== Effort done ==
=== VGA ===Pixels and VRAM. Palette and rasters. CRTC0 ==== DONE : CRTC0 ====CRTC0 seems the best one, some demo does cry when detecting a poor CRTC1 (CRTC1 seem a low cost version of CRTC0). I have to implement a CRTC0 instead of my current CRTC1... In fact CRTC1 is the best one. CRTC2 is the low cost version. CRTC0 did appears before CRTC1. Done in r005.8.14. Detected as CRTC0 by WakeUp! - "Enjoy the show" message displayed. In r005.8.15. WakeUp! (CRTC0/MEM_wr quick) detected as Emu first time, and after a quick reset, does say detected as CRTC0. === ram_palette ===VRAM contains 800x300 amstrad pixels (VZoom x2), displayed VGA 800x600@72Hz with fix regular border at 768×576 and fix inside border at 768×544. * simple_GateArrayInterrupt.vhd (GA to VRAM) parameters : VRAM_Hoffset/VRAM_Voffset* aZRaEL_vram2vgaAmstradMiaow.vhd (VRAM to VGA) parameters : H_BEGIN/H_END/V_BEGIN/V_END (theorical fixed values)To calibrate : VRAM_Hoffset++ does offset one char left. VRAM_Voffset++ does offset one line up. On display H_BEGIN does begin to scan lines of VRAM. But V_BEGIN does not enter in consideration here : vertical=0 does begin to scan columns of VRAM. In original CPC, top border has 1/2 char more than bottom border. I used Batman Forever default welcome/calibration screen to calibrate VRAM offsets. RAM_palette contains the ink list and the mode for each line of VRAM, sampled at horizontal middle of 800x600 screen, and used at begin of each line. === TODO : a better border heuristic ===Using winape testbench (plustest), test 2 does show somes problems while border does go out of screen, negative border does hide line itself. === bootloader ===SDCARD and RAM.=== GA: interrupts, VSYNC === === Alignment of HSYNC Interrupt ===Interrupt are respected since version "candidate 001" of FPGAmstrad. [[File:JavaCPC_running_norecess.jpg]] JavaCPC running norecess's "using-interrupts" code [[http://norecess.cpcscene.net/using-interrupts.html]] It could be interesting to test this asm code on next version of FPGAmstrad.==== TODO : arnoldemu testbench - cpctest ====[http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-%27acid%27-test/ forum : amstrad cpc "acid" test] => ''I have uploaded updated tests : [http://cpctech.cpc-live.com/test.zip http://cpctech.cpc-live.com/test.zip]'' Tests done here : ppi/psg/cpctest. [[File:arnoldemu_testbench_CPCTEST-r005-6.png]] In r005.6, I reach successfully some arnoldemu tests to calibrate more efficiently HSYNC interrupt : ppi.bin, psg.bin, cpctest.bin. Games unlocked by r005.6 : Sigma7, Pac-land, Golden Tail. In r005.8, Prehistorik is running fine. In r005.8.4, arnoldemu testbench "cpctest" does fail :/ In r005.8.7, arnoldemu testbench "cpctest" is OK In r005.8.14 version, using default mode "MEM_wr:quick", is OK. And Prehistorik II is running fine. In r005.8.16c29, arnoldemu testbench "cpctest" is OK (but it is a wip version :p) ===== TODO : arnoldemu testbench - crtctest =====Adding choice of CRTC 0 or 1 on OSD, and passing this test could be great. === GA: WAIT_n generator === ==== Sniffing of a real Amstrad ====[[File: cpc_plus_m1.jpg]]Code name: Raptor I listen to some wires of my Amstrad CPC 6128 plus, but I can't access VSYNC/HSYNC output of CRTC, so I have to buy another model in order to do this test. In fact you can listen at clock of Amstrad and transmit it to FPGA DCM component, resulting a accelerated clock sequence, that's it, with FPGA DCM you can overclock output Amstrad clock signal in order to insert more operations, I use this tip for listening signals and save them inside starter kit asynchronous RAM (write, stop write, write, stop write... I’m a perfectionist paranoid...) You can power Amstrad CPC using extension port, applying 5v. By doing it, power down button of Amstrad doesn’t run. Using this way you reach a common 5v power between starter-kit and Amstrad. I connected wires from extension port directly to FPGA, as they are used just for listening. ==== Instruction timing ====
I tested instruction timing of [[T80]] compare to instruction timing of JavaCPC emulator. I deduce synchronization of Z80 with CRTC on M1 signal by WAIT_n insertion in order to have a multiple of 4 Tstates per instruction. I deduce also one WAIT_n inserted during MEM_WR operation (yes I log testbench [[T80]], I’m crazy)
(CPC Timing array (first instruction set))
=== Z80 ===Architecture of Z80. ==== Test of a real Zilog 80 ====
[[File:Z80fx2bb.jpg]]
Code name : Z80fx2bb, real Z80@2MHz (instead of 4MHz) on fx2bb extension card.
Problem here : CPDR and CPIR has same implementation than CPD and CPI.
=== Alignment of HSYNC Interrupt DSK ===Interrupt are respected since version "candidate 001" It's data, insertion of FPGAmstraddisk.
[[File:JavaCPC_running_norecess.jpg]]
JavaCPC running norecess's "using-interrupts" code [[http://norecess.cpcscene.net/using-interrupts.html]]
It could be interesting to test this asm code on next version of FPGAmstrad.
==== TODO : arnoldemu testbench - cpctest ====
[http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-%27acid%27-test/ forum : amstrad cpc "acid" test] => ''I have uploaded updated tests : [http://cpctech.cpc-live.com/test.zip http://cpctech.cpc-live.com/test.zip]''
Tests done here : ppi/psg/cpctest.
[[File:arnoldemu_testbench_CPCTEST-r005-6.png]]
In r005.6, I reach successfully some arnoldemu tests to calibrate more efficiently HSYNC interrupt : ppi.bin, psg.bin, cpctest.bin.
Games unlocked by r005.6 : Sigma7, Pac-land, Golden Tail.
In r005.8, Prehistorik is running fine.
In r005.8.4, arnoldemu testbench "cpctest" does fail :/
In r005.8.7, arnoldemu testbench "cpctest" is OK
In r005.8.14 version, using default mode "MEM_wr:quick", is OK. And Prehistorik II is running fine.
In r005.8.16c29, arnoldemu testbench "cpctest" is OK (but it is a wip version :p)
===== TODO : arnoldemu testbench - crtctest =====
Adding choice of CRTC 0 or 1 on OSD, and passing this test could be great.
=== ram_palette ===
VRAM contains 800x300 amstrad pixels (VZoom x2), displayed VGA 800x600@72Hz with fix regular border at 768×576 and fix inside border at 768×544.
* simple_GateArrayInterrupt.vhd (GA to VRAM) parameters : VRAM_Hoffset/VRAM_Voffset
* aZRaEL_vram2vgaAmstradMiaow.vhd (VRAM to VGA) parameters : H_BEGIN/H_END/V_BEGIN/V_END (theorical fixed values)
To calibrate : VRAM_Hoffset++ does offset one char left. VRAM_Voffset++ does offset one line up. On display H_BEGIN does begin to scan lines of VRAM. But V_BEGIN does not enter in consideration here : vertical=0 does begin to scan columns of VRAM.
In original CPC, top border has 1/2 char more than bottom border. I used Batman Forever default welcome/calibration screen to calibrate VRAM offsets.
RAM_palette contains the ink list and the mode for each line of VRAM, sampled at horizontal middle of 800x600 screen, and used at begin of each line.
=== Sniffing of a real Amstrad ===
[[File: cpc_plus_m1.jpg]]
Code name: Raptor
I listen to some wires of my Amstrad CPC 6128 plus, but I can't access VSYNC/HSYNC output of CRTC, so I have to buy another model in order to do this test. In fact you can listen at clock of Amstrad and transmit it to FPGA DCM component, resulting a accelerated clock sequence, that's it, with FPGA DCM you can overclock output Amstrad clock signal in order to insert more operations, I use this tip for listening signals and save them inside starter kit asynchronous RAM (write, stop write, write, stop write... I’m a perfectionist paranoid...)
You can power Amstrad CPC using extension port, applying 5v. By doing it, power down button of Amstrad doesn’t run. Using this way you reach a common 5v power between starter-kit and Amstrad. I connected wires from extension port directly to FPGA, as they are used just for listening.
=== ROM and RAM extension ===
In r004, you have more RAM +512KB, and you can add ROMs.
* LowerROM has .eZZ file extension
* UpperROM has .e00 ot eFF file extension (hexa)
In r005.4, I add another UpperROM set : .f00 to .fFF file extension (hexa). If you press "space" during a reset_key ("page up" key), upperROM files used range from .f00 to .fFF instead of ranging from .e00 to .eFF. LowerROM .eZZ file extension is still used in both case.
==== TODO : RAM 4MB extension ====
Why not ?
=== Sound output ===
==== PWM ====
Using a simple [[PWM]], data is entered at a certain speed, the [[PWM]] clock speed.
If you simulate a constant [[PWM]] output signal at middle range of voltage (state just between 0V and 5V : 2.5V), it results an alternance of 0V and 5V, that result in a noise sound. In Arkanoid, this defect make some continues sounds instead of silents...
My idea is generating a sound having a frequency upper than dog ultra sound, while I want to simulate a constant 2.5V.
For this I do use two clocks entries in my [[PWM]] : one about data entry, and another about algorithm execution.
This result a high quality sound output (in addition to this nice [http://www.fpgaarcade.com/library.htm Yamaha sound chip from fpgaarcade])
==== Stereo sound output ====
[[File:STarKos1 21 FPGAmstrad_800x600.png|none|STarKos 1.21 running on FPGAmstrad]]
Sound chip was modified in order to get channel A+B at left, and channel B+C at right.
It was tested OK using [http://www.grimware.org/doku.php/documentations/software/starkos/start STarKos 1.21] sound tracker (track "Carpet")
In r005.8.14.1 STarKos does feel better using parameter "MEM_wr:slow" in OSD menu.
run"stk / esc / enter / enter / => / enter / space (wait) / esc / ctrl+F2 / \/ (bottom arrow) / space
(ctrl+F1 to go back into the disk menu)
STarKos seems running PERFECTLY using A-Z80 instead of T80, please do contact me if you want a personalized fork version of CoreAmstrad using A-Z80 (I have just to switch a parameter : USE_AZ80:boolean:=false; in FPGAmstrad_amstrad_motherboard.vhd)
==== DONE: Another disk selector ====
In first version of FPGAmstrad (NEXYS2) I used switches for disk selection. As final FPGA platform doesn't have any switches set, I have to add an BASIC instruction for it, something like "OUT &CAFE,disk_number" could be fine.
"PRINT INP(&CAFE)" does print current disk selected number.
==== DONE : A advanced dsk drive ====
Done on r004, I added also a second Drive in order to copy easily files from one disk to another.
Irregular sector size ok.
You just have to select Drive A or B from OSD before selecting another dsk file.
Write is done directly on sdcard dsk file, so you can save games, and write texts...
You can now change disk without reset. And then play games using several disks.
[http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/fdc-floppy-t80ds-detection/ CPCWiki forum - Amstrad CPC hardware - FDC floppy t80ds detection] : talk about FDC in MiST-board CoreAmstrad.
==== DONE : A advanced FDC (with write access and more) ====
Since r004 "mecashark", the FDC implementation has write access !
==== UNDONE : FAT32 fragmented files support ====
Since advanced FDC, dsk files have to be defragmented. Only ROMs are safe with a not defragemented sdcard...
==== TODO : SNAP DSK ====
Add an option in OSD MENU : "SNAP DSK". Does create a copy of current disk in current drive into "SNAP[number].DSK". Heuristic for number : file count (at boot, incremented at each snap dsk done)
==== TODO : fix message "This program will not run in this environment. Press any key" ====
HartOz
The core does not support the bundled CP/M+ software.
With a valid working CP/M+ Disc1 image mounted, the systems returns with the following message after issuing the |cpm command.
"This program will not run in this environment. Press any key"
Due to using wrong language version of CP/M+ disc (cpmpluf1.dsk is french version of CP/M+)
[[File:Cpmpluf1.dsk.png|thumbnail|CP/M+ fr disk inserted (cpmpluf1.dsk)]]
"Wrong disk for your configuration" message seen in one-disk version of "Batman Forever" demo (two separate disk version runs fine), in forum they say that dsk image is using "bad track numbers", in fact when looking at a Track-Info with side 1 (instead of 0), track and side are correct in Track-Info but side is not ok in Sector-Info, normaly track/side are ignored in Sector-Info (Track-Info is used for that)... but still having the message, something else seems also wrong.
Do fix also message "Bad Command" while running a not existing file on disk.
Certainly linked to ''Orion Primes.dsk'' loading problem.
=== TODO : A X/Y input ===
I want to work also on screen-pen entry, is there a manner to detect an analog X/Y as pen or gun ? YES : [http://java.cpc-live.com/gx4000.php Markus Hohmann] does it, he implements the lightgun on JavaCPC-GX4000 using mouse :)
http://cpcrulez.fr/hardware-pistolet-magnum_light_phaser_ACPC.htm
register 11,12 and 13 ?
=== DONE: A SCART output ===
In order to plug FPGAmstrad on TV, and help debugging. And also to test a simple scan-doubler.
r005c17 : experimental version, original signal TV output is running fine, with OSD menu. Have to add a flag in mist.ini instead of using OSD menu.
scan-doubler doesn't run ok in mode 2, and has strange offset with Arkanoid (vertical display games), so it unvalidated : only original TV output will be added to r004 in r005.
r005 : VGA 60H/TV 50Hz.
==== DONE : an OSD option to enable scan-doubler ====
scan-doubler (simple TV to VGA converter) doesn't run ok in mode 2, but there is some many recent demo effect that doesn't pass using current VGA 72Hz implementation. Have to try to insert both VGA implementations.
core_r005c18 seems having a scan-doubler output, have to merge it.
==== DONE : A SCART output with border ====
Original output signal has no border, I have to implement the original border in TV mode.
Priority: HIGH! (asked by Markus Hohmann)
Done in r005.8.14.2
==== DONE : move SCART parameter into mist.ini ====
Doing like in other cores : do use the global "scandoubler" option in mist.ini to switch between VGA and TV mode.
==== DONE : mix SCART H and V sync into HV sync (sort of C sync) ====
[http://github.com/mist-devel/mist-binaries/issues/35 Amstrad CPC core · Issue #35 · mist-devel-mist-binaries · GitHub] :
SCART TVs expect a composite sync. The VGAs vsync is connected the SCART pin used to detect a RGB signal and is constantly driven high. A TV will not cope with a video signal with separate H and V sync.
Bu tit's usually sufficient to xor hsync and vsync to get a csync acceptable for many TVs.
So something like this
Vsync=1;
Hsync=old_Vsync xor old_Hsync;
Done in r005.8.14.1
==== DONE : refactor of Parrot PAL signal ====
I found a running 15kHz TV, with [http://github.com/mist-devel/mist-board/blob/master/tutorials/soc/lesson11/lesson11.png mist-board tutorial lesson11 Parrot PAL] running fine, but not with CoreAmstrad r005.8.14.1. It's the same TV I used some years ago at festival with original CPC. I have to refactor Parrot tutorial and adapt it on CoreAmstrad in order to generate a better TV signal quality.
Done in r005.8.14.2
In theory, simple_GateArrayInterrupt.vhd shall have :
vsync_azrael<=etat_monitor_vhsync(2);
hsync_azrael<=etat_monitor_hsync(2);
if hSyncCount=2+4 then
In practice - in r005.8.14.2 - here we have :
vsync_azrael<=etat_monitor_vhsync(1);
hsync_azrael<=etat_monitor_hsync(1);
if hSyncCount=1+4 then
This way screen is nicely centered but CPCWiki rule "The HSYNC is modified before being sent to the monitor. It happens 2us after the HSYNC from the CRTC and lasts 4us when HSYNC length is greater or equal to 6. If R2=46, and HSYNC width is 14 then monitor hsync starts at 48 and lasts until 51." is not respected.
Test about centering screen are done using "BORDER 0", this way border is ignored and does interact with HSYNC/VSYNC screen synchronisation.
=== DONE : CRTC1 ===
r004.8 : a better CRTC/Gateway implementation, following better JEmu (JavaCPC) one... but it is a CRTC1 (but a better ONE)
Some bugs came from PPI also (keyboard bugs in particular), solved in r004.8
==== DONE : CRTC0 ====
CRTC0 seems the best one, some demo does cry when detecting a poor CRTC1 (CRTC1 seem a low cost version of CRTC0). I have to implement a CRTC0 instead of my current CRTC1...
In fact CRTC1 is the best one. CRTC2 is the low cost version. CRTC0 did appears before CRTC1.
Done in r005.8.14. Detected as CRTC0 by WakeUp! - "Enjoy the show" message displayed.
In r005.8.15. WakeUp! (CRTC0/MEM_wr quick) detected as Emu first time, and after a quick reset, does say detected as CRTC0.
==== DONE : CRTC1 detection ====
I don't remember exactly, but in r005.8.4, one of "Midline Process"/"From Scratch"/"Pheelone" demo does crash due to a "CRTC1 needed" message : my CRTC1 seems not detected as a true CRTC1... If's "From Scratch" that does display this message in fact.
Done in r005.8.14 : Still Rising (Vanity) demo can be launched, better using "MEM_WR:slow" mode.
[http://quasar.cpcscene.net/doku.php?id=coding:test_crtc Test CRTC - Quasar Net]
=== TODO : Interlaced scanlines ===
Interlaced scanline is an effect existing in CRTC (register R8) used by Wolfenstrad demo
Seen also at begin of '''R-Typeee.dsk''' ("stereo soundtrack" message's picture), and seem also used in a lot of recent demos as "flipping lace" effect.
Scanline is also used just at begin of '''Pinball_Dreams__PREVIEW.DSK''' (eagle draw) - in fact I've got a doubt here, it seems more about a problem of HSYNC edge choice of alignement here.
[http://cpc.sylvestre.org/technique/technique_identifier_crtc.html Les Sucres en Morceaux - Amstrad CPC - Identifier les CRTC]
OUT &BC00,8
OUT &BD00,3
[http://quasar.cpcscene.net/doku.php?id=coding:test_crtc Test CRTC - Quasar Net]
L'écran passe en 100Hz, les registres 4 et 7 doivent être doublés pour retomber sur 50Hz
=== DONE : Scanlines ===
Here effect is about simulating CRT (not CRTC.R8) original screen. There is several way to implement it.
Here, truly one line out of two is 1/2 darker. By visual effect this result in "a thin full black horizontal line".
[[File:FGPAmstrad cc withoutScanlines.png|thumbnail]]
[[File:FGPAmstrad cc withScanlines.png|thumbnail]]
=== DONE : Monochrome option ===
Add an option to turn screen into green monochrome mode (in mode TV and in mode VGA)
done in r005.8.9.2 (Soleil Vert demo)
[[File:Soleil vert CoreAmstrad.png|thumbnail]]
[[File:Soleil vert CoreAmstrad scandb50Hz.png|thumbnail]]
[http://cpc.sylvestre.org/technique/technique_coul1.html Les Sucres en Morceaux - Couleurs - 1 - Les couleurs du CPC]
==== DONE : Monochrome OSD ====
Could be great having the OSD in monochrome when monochrome is selected and scanlined when scanline is selected
Done in r005.8.14.4
==== TODO : Scanline during monochrome + scandb50Hz modes ====
soleil vert demo display result is best using scandb50Hz mode (r005.8.16c29) because it does alternate two pictures at 25Hz, seeming then like a fixed image for humans.
But my scandb50Hz option does not enable yet the scanline effect that could improve her agains this demo. To do.
=== TODO : Ethernet ===
Integration of "ethernec.v".
Several multiplayer games using several CPC does already exists : [[Virtual_Net_96]].
==== DONE : arnoldemu's testbench fdctest ====
arnoldemu's testbench to pass : test/fdctest/fdctest/fdctest.dsk
[http://www.cpctech.org.uk/test.zip http://www.cpctech.org.uk/test.zip] arnold test last update. Folder disc/, tests : "seek, recalibrate, sense interrupt status, sense drive status, write protect"
=== TODO : github migration ===
Have to migrate source-code repository from renaudhelias github to mist-devel github. And also update each url in head of source-code files...
=== PPI ===
Problematic here : Keyboard detection versus VSYNC signal versus interrupt cycle.
==== DONE : A better PIO ====
Overclocked at 16MHz.
=== SOUND ===
PWM.
=== TODO : a better border heuristic = PWM ====Using winape testbench (plustest), test 2 does show somes problems while border does go out of screen, negative border does hide line itself.
=== TODO : AMX mouse support ===Asked by KLNHOMEALONEUsing a simple [[PWM]], data is entered at a certain speed, the [[PWM]] clock speed.
=== UNDONE If you simulate a constant [[PWM]] output signal at middle range of voltage (state just between 0V and 5V : pause Z80 while OSD is displayed ===Cause playing Double Dragon II without "pause"2.5V), is quite difficultit results an alternance of 0V and 5V, that result in a noise sound. In Arkanoid, this defect make some continues sounds instead of silents...
Or else using "Pause" key ?My idea is generating a sound having a frequency upper than dog ultra sound, while I want to simulate a constant 2.5V.
Can have border effect For this I do use two clocks entries in sound (perhaps sound can be "freeze" my [[PWM]] : one about data entry, and then still upanother about algorithm execution...)
=== TODO This result a high quality sound output (in addition to this nice [http: tapes ===Do read //www.CDT files alsofpgaarcade.com/library.htm Yamaha sound chip from fpgaarcade])
I think @ralferoo had already written FPGA code for tape reading for his FPGA CPC. Maybe you can borrow some code from him?==== Stereo sound output ==== Bryce[[File:STarKos1 21 FPGAmstrad_800x600.png|none|STarKos 1.21 running on FPGAmstrad]]
=== DONE BUT SEEMS USELESS Sound chip was modified in order to get channel A+B at left, and channel B+C at right.It was tested OK using [http: welcome VGA signal ===//www.grimware.org/doku.php/documentations/software/starkos/start STarKos 1.21] sound tracker (track "Carpet")
While bootloader is not fully started, do display a lighter screen output (not darker pixels as original screen color CPC depth using more resistors), as it VGA should be nicely centered at each bootIn r005. And then after come back to original CPC pixel depth8.14.1 STarKos does feel better using parameter "MEM_wr:slow" in OSD menu.
Some VGA does detect FPGAmstrad resolution just if pixels are ligther, so I turn them lighter during start of engine. Normaly a press into reset button run"stk / esc / enter / enter / => / enter / space (the one front the sdcard entrywait) does solve directly this problem / esc / ctrl+F2 / \/ (you can also turn on screen before MiST-board with this sort of screensbottom arrow) / space(ctrl+F1 to go back into the disk menu)
I tryed also [http://github.com/mistSTarKos seems running PERFECTLY using A-devel/mist-binaries/tree/master/cores/menu menu core project] with my stupid screen, as it normally I can power on MiST-board before screen for FPGAmstrad (switching core does the stuff here also) Tryed in r005.8.14.4 : lighter pixels during bootload. Also with a full white screen. This solution does not fix the problem Z80 instead of "stupid screen"T80, but reveals something interesting about the defect (next chapter) ==== SAMSUNG 16/9 tests ====Using lighter pixels full white screen during bootload show please do contact me that screen doubts between two positions : a perfect centered 4/3 with 6.5 centimeters horizontal border each; and a starting 16/9 at left, crop at 6.5 centimeters left. Without lighter pixels full white screen, the crop of image does change, moving into first displayed characters : in fact in SAMSUNG menu, the position of screen is not 50 50, if you put 50 50 you come back to "lighter pixels full white screen" defect. So here screen begining at first char displayed on screen is want a second defect, but a small one, as you personalized fork version of CoreAmstrad using A-Z80 (I have just have to set 50 50 in SAMSUNG menu. So back to previous bug : screen doubt between two positions "switch a perfect centered 4/3 with 6.5 centimeters horizontal border each; and a starting 16/9 at left, crop at 6.5 centimeters left".When displaying a game, in fact, in found two different case in "perfect centered 4/3" case , this case is not so perfect, it does also doubts between two positions parameter : * one time screen does crop at 6.5 left and right, changing the screen vertical position using menu does translate the image cropping left and right at fix position USE_AZ80: 6.5 centimeters fix black border. About extra 1 centimeter pixels boolean: image =false; in middle of image does move, but not the borders at allFPGAmstrad_amstrad_motherboard.* a second time image does move perfectly (completely/totallyvhd) left and right without crop, and if centered has 6.5 black border left and right. This time image seems complete but crushed. === TODO : snapshoot purpose ===Like in emulators, do something to go back in time while running a game.
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