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	<title>Programming:Simple Raster Example 3 (uses CPC plus features) - Revision history</title>
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		<id>https://www.cpcwiki.eu/index.php?title=Programming:Simple_Raster_Example_3_(uses_CPC_plus_features)&amp;diff=15056&amp;oldid=prev</id>
		<title>CPCLER at 07:59, 14 March 2007</title>
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		<updated>2007-03-14T07:59:54Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;&amp;lt;pre&amp;gt;&lt;br /&gt;
;; This example shows a simple raster using the CPC+ &lt;br /&gt;
;; extended palette, and using the CPC+ programmable &lt;br /&gt;
;; raster interrupts to define the position of the raster &lt;br /&gt;
;; on the display.&lt;br /&gt;
;;&lt;br /&gt;
;; This example is designed for CPC+ only and will&lt;br /&gt;
;; not work on the CPC or KC Compact.&lt;br /&gt;
;;&lt;br /&gt;
;; This example will compile with the MAXAM assembler&lt;br /&gt;
;; or the built-in assembler of WinAPE32.&lt;br /&gt;
&lt;br /&gt;
.scr_set_mode equ &amp;amp;bc0e&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
org &amp;amp;8000&lt;br /&gt;
nolist&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
;; clear screen&lt;br /&gt;
&lt;br /&gt;
ld a,1&lt;br /&gt;
call scr_set_mode&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
;;--------------------------------------------------&lt;br /&gt;
;; STEP 1 -  Unlock CPC+ additional features&lt;br /&gt;
&lt;br /&gt;
di&lt;br /&gt;
ld b,&amp;amp;bc&lt;br /&gt;
ld hl,sequence&lt;br /&gt;
ld e,17&lt;br /&gt;
.seq &lt;br /&gt;
ld a,(hl)&lt;br /&gt;
out (c),a&lt;br /&gt;
inc hl&lt;br /&gt;
dec e&lt;br /&gt;
jr nz,seq&lt;br /&gt;
ei&lt;br /&gt;
&lt;br /&gt;
;;----------------------------------------------------------&lt;br /&gt;
;; STEP 2 - Install a interrupt handler&lt;br /&gt;
&lt;br /&gt;
;; disable interrupts&lt;br /&gt;
di&lt;br /&gt;
;; interrupt mode 1 (call to interrupt handler at &amp;amp;0038)&lt;br /&gt;
im 1&lt;br /&gt;
&lt;br /&gt;
;; &amp;amp;c9 corresponds to the opcode RET&lt;br /&gt;
;; &amp;amp;fb corresponds to the opcode EI&lt;br /&gt;
;;&lt;br /&gt;
;; RET opcode takes 3us, EI opcode takes 1us&lt;br /&gt;
&lt;br /&gt;
;; write EI,RET to interrupt handler at &amp;amp;0038&lt;br /&gt;
ld hl,&amp;amp;c9fb&lt;br /&gt;
ld (&amp;amp;0038),hl&lt;br /&gt;
&lt;br /&gt;
;; enable interrupts&lt;br /&gt;
ei&lt;br /&gt;
&lt;br /&gt;
;;----------------------------------------------------------&lt;br /&gt;
;; STEP 3 -  Initialise CPC+ Programmable Raster Interrupt&lt;br /&gt;
&lt;br /&gt;
;; disable interrupts&lt;br /&gt;
di&lt;br /&gt;
&lt;br /&gt;
;; page-in asic registers to &amp;amp;4000-&amp;amp;7fff&lt;br /&gt;
ld bc,&amp;amp;7fb8					&lt;br /&gt;
out (c),c					&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
ld a,100						;; line 100&lt;br /&gt;
ld (&amp;amp;6800),a					;; set line&lt;br /&gt;
&lt;br /&gt;
;; page-out asic registers&lt;br /&gt;
ld bc,&amp;amp;7fa0&lt;br /&gt;
out (c),c&lt;br /&gt;
&lt;br /&gt;
;; enable interrupts&lt;br /&gt;
ei&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
;;------------------------------------------------------------&lt;br /&gt;
&lt;br /&gt;
.main_loop&lt;br /&gt;
;; wait for interrupt&lt;br /&gt;
halt&lt;br /&gt;
&lt;br /&gt;
;; delay so that colour change is hidden by border&lt;br /&gt;
defs 16&lt;br /&gt;
&lt;br /&gt;
;; page-in asic registers to &amp;amp;4000-&amp;amp;7fff&lt;br /&gt;
ld bc,&amp;amp;7fb8					;; [3]&lt;br /&gt;
out (c),c					;; [4]&lt;br /&gt;
&lt;br /&gt;
;; address of pen 0 in CPC+ ASIC registers&lt;br /&gt;
ld de,&amp;amp;6400					;; [3]&lt;br /&gt;
&lt;br /&gt;
;; start of table&lt;br /&gt;
ld hl,raster_colours		;; [3]&lt;br /&gt;
&lt;br /&gt;
;; number of colours in table*2&lt;br /&gt;
ld b,end_raster_colours-raster_colours   ;; [2]&lt;br /&gt;
;; /2&lt;br /&gt;
srl b&lt;br /&gt;
&lt;br /&gt;
.rl&lt;br /&gt;
;; read colour from table (a byte at a time)&lt;br /&gt;
;; write colour to ASIC colour palette (a byte at a time)&lt;br /&gt;
ld a,(hl)					;; [2]&lt;br /&gt;
ld (de),a					;; [2]&lt;br /&gt;
inc hl						;; [2]&lt;br /&gt;
inc e						;; [1]&lt;br /&gt;
ld a,(hl)					;; [2]&lt;br /&gt;
ld (de),a					;; [2]&lt;br /&gt;
inc hl						;; [2]&lt;br /&gt;
dec e						;; [1]&lt;br /&gt;
&lt;br /&gt;
;; delay so that the next colour change occurs&lt;br /&gt;
;; immediatly below this colour change&lt;br /&gt;
defs 64-2-2-2-1-2-2-2-1-1-3&lt;br /&gt;
&lt;br /&gt;
dec b						;; [1]&lt;br /&gt;
jp nz,rl					;; [3]&lt;br /&gt;
&lt;br /&gt;
;; page-out asic registers&lt;br /&gt;
ld bc,&amp;amp;7fa0&lt;br /&gt;
out (c),c&lt;br /&gt;
&lt;br /&gt;
jp main_loop&lt;br /&gt;
&lt;br /&gt;
;;---------------------------------------------&lt;br /&gt;
&lt;br /&gt;
;; - there is two bytes per colour.&lt;br /&gt;
;; - these are stored in a form that can be written direct &lt;br /&gt;
;; to the CPC+ colour palette registers&lt;br /&gt;
.raster_colours&lt;br /&gt;
defw &amp;amp;0001&lt;br /&gt;
defw &amp;amp;0004&lt;br /&gt;
defw &amp;amp;0008&lt;br /&gt;
defw &amp;amp;000d&lt;br /&gt;
defw &amp;amp;000f&lt;br /&gt;
defw &amp;amp;000d&lt;br /&gt;
defw &amp;amp;0008&lt;br /&gt;
defw &amp;amp;0004&lt;br /&gt;
defw &amp;amp;0001&lt;br /&gt;
defw &amp;amp;0000&lt;br /&gt;
.end_raster_colours&lt;br /&gt;
&lt;br /&gt;
;;----------------------------------------------------------&lt;br /&gt;
;; this is the sequence to unlock the ASIC extra features&lt;br /&gt;
.sequence&lt;br /&gt;
defb &amp;amp;ff,&amp;amp;00,&amp;amp;ff,&amp;amp;77,&amp;amp;b3,&amp;amp;51,&amp;amp;a8,&amp;amp;d4,&amp;amp;62,&amp;amp;39,&amp;amp;9c,&amp;amp;46,&amp;amp;2b,&amp;amp;15,&amp;amp;8a,&amp;amp;cd,&amp;amp;ee&lt;br /&gt;
&amp;lt;/pre&amp;gt;&lt;br /&gt;
&lt;br /&gt;
[[Category:Programming]][[Category:CPC Plus]]&lt;/div&gt;</summary>
		<author><name>CPCLER</name></author>
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