== I/O Ports ==
F8E0h Z80 STI Indirect Data Register Read Write
F8E1h Z80 STI Gen. Purpose I/O Interrupt Read Write
F8E8h Z80 STI Pointer Vector Register Read Write
F8ECh Z80 STI USART Control Register Read Write
F8EDh Z80 STI Receiver Status Register Read Write
F8EEh Z80 STI Transmitter Status Register Read Write
F8EFh Z80 STI USART Data Register Read Write
* Default I/O addresses are F8E0h-F8EFh (though the interface can be jumpered to use different addresses). F8E0h - Indirect Data Register F8E1h - General Purpose I/O Data Register (0=Low, 1=High) F8E2h - Interrupt Pending Register B (write 0=clear, 1=unchanged) ;\ F8E3h - Interrupt Pending Register A (write 0=clear, 1=unchanged) ; F8E4h - Interrupt in-Service Register B ; not used F8E5h - Interrupt in-Service Register A ; F8E6h - Interrupt Mask Register B (0=masked, 1=unmasked) ; F8E7h - Interrupt Mask Register A (0=masked, 1=unmasked) ;/ F8E8h - Indirect Index and Interrupt Vector Register F8E9h - Timers A and B Control Register ;\ F8EAh - Timer B Data Register ; not used F8EBh - Timer A Data Register ;/ F8ECh - USART Control Register F8EDh - Receiver Status Register F8EEh - Transmitter Status Register F8EFh - USART Data Register For details on the registers, see [[Z80-STI]].
== Software ==