Plus Vectored Interrupt Bug
NOTE: Vectored interrupts are bugged.
Following discussions on cpcwiki involving roudoudou, Longshot, gerald, arnoldemu and dragon, it has been found that if the instruction which is being interrupted is located in a memory region where A13=1 (i.e. &2000-&3fff, &6000-&7fff, &a000-&cfff, &e000-&ffff) then the bug will not occur.
When the instruction is in a memory region where A13=0 then the vector will be seen to change between 6 and 4. This is related to if the CPU is performing a memory read/write.
The bug is independent of the value of I register, the location of the interrupt service routine, the location of the vector table which has the interrupt service routine addresses.
The exact triggers are being investigated.
Advice, either point all interrupt vectors to the same interrupt handler and manually acknowledge the dma interrupts OR locate your code where A13=1.
