In the CPC+ system, the functions of the Gate-Array are integrated into a single [[ASIC]]. When the ASIC is "locked", the extra features are not available and the ASIC operates the same as the Gate-Array in the CPC allowing programs written for the CPC to work on the Plus without modification. The ASIC must be "un-locked" to access the new features.
In the [[KC compact ]] system, the functions of the Gate-Array are "emulated" in [[TTL logic]] and by the [[Zilog Z8536 CIO]].
In the "cost-down" version of the CPC6128, the functions of the Gate-Array are integrated into a ASIC.
Bit Value Function <br>7 0 Gate Array function "Pen Selection" <br>6 0 <br>5 x not used <br>4 1 Select border <br>3 x ignored <br>2 x ignored <br>1 x ignored <br>0 x ignored
Bit Value Function <br>7 0 Gate Array function "Pen Selection" <br>6 0 <br>5 x not used <br>4 0 Select pen <br>3 x Pen Number <br>2 x <br>1 x <br>0 x
<br>7 0 Gate Array function "Pen Selection"6 05 x not used4 0 Select pen3 x Pen Number2 x1 x0 x ==== Colour selection<br>==== Once the pen has been selected the colour can then be changed. Bits 4 to 0 specify the hardware colour number from the hardware colour palette.
Even though there is provision for 32 colours, only 27 are possible. The remaining colours are duplicates of those already in the colour palette.
Summary<br> Bit Value Function <br> 7 0 Gate Array function "Colour Selection" <br>6 1 <br>5 x not used <br>4 x Colour number <br>3 x <br>2 x <br>1 x <br>0 x
<br>Hardware colour palette:
This is a general purpose register responsible for the screen mode and the rom configuration.
==== Screen mode selection====
The function of bits 1 and 0 is to define the screen mode. The settings for bits 1 and 0 and the corresponding screen mode are given in the table below.
Bit 1 Bit 0 Screen mode
0 0 Mode 0, 160x200 resolution, 16 colours <br>0 1 Mode 1, 320x200 resolution, 4 colours <br>1 0 Mode 2, 640x200 resolution, 2 colours <br>1 1 Mode 3, 160x200 resolution, 4 colours (note 1)
<br>{|{{Prettytable|width: 700px; font-size: 2em;}}|''Bit 1''||''Bit 0''||''Screen mode'' |-|0||0||Mode 0, 160x200 resolution, 16 colours|-|0||1||Mode 1, 320x200 resolution, 4 colours|-|1||0||Mode 2, 640x200 resolution, 2 colours|-|1||1||Mode 3, 160x200 resolution, 4 colours (note 1)|-|} This mode is not official. From the combinations possible, we can see that 4 modes can be defined, although the Amstrad only has 3. Mode 3 is similar to mode 0, because it has the same resolution, but it is limited to only 4 colours. <br> Mode changing is synchronised with HSYNC. If the mode is changed, it will take effect from the next HSYNC. <br> ==== Rom configuration selection<br>==== Bit 2 is used to enable or disable the lower rom area. The lower rom area occupies memory addressess &0000-&3fff and is used to access the operating system rom. When the lower rom area is is enabled, reading from &0000-&3FFF will return data in the rom. When a value is written to &0000-&3FFF, it will be written to the ram underneath the rom. When it is disabled, data read from &0000-&3FFF will return the data in the ram.
Similarly, bit 3 controls enabling or disabling of the upper rom area. The upper rom area occupies memory addressess &C000-&FFFF and is BASIC or any expansion roms which may be plugged into a rom board/box. See the document on upper rom selection for more details. When the upper rom area enabled, reading from &c000-&ffff, will return data in the rom. When data is written to &c000-&FFFF, it will be written to the ram at the same address as the rom. When the upper rom area is disabled, and data is read from &c000-&ffff the data returned will be the data in the ram.
Summary<br>Bit Value Function <br>7 0 Gate Array function <br>6 1 <br>5 x not used <br>4 x Interrupt generation control <br>3 1 Upper rom area disable <br>0 Upper rom area enable <br>2 1 Lower rom area disable <br>0 Lower rom area enable <br>1 x Mode selection <br>0 x
== Programming the Gate Array - Examples ==