Changes

Gate Array

1,883 bytes added, 30 March
/* See also */
In the CPC+ system, the functions of the Gate-Array are integrated into a single [[ASIC|ASIC]]. When the ASIC is "locked", the extra features are not available and the ASIC operates the same as the Gate-Array in the CPC allowing programs written for the CPC to work on the Plus without modification. The ASIC must be "un-locked" to access the new features.
In the [[KC Compact]] system, the functions of the Gate-Array are "emulated" in TTL chips, [[TTL logicCIO Overview|TTL logicCIO]] , and by the [[CIO]]its color translation EPROM.
In the "cost-down" version of the CPC6128, the functions of the Gate-Array are integrated into a ASIC.
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
|''Data Bit 7''||''Data Bit 6''||''Function''
|-
| 0 || 0 || Select pen
===== Note =====
This function is not available in the Gate-Array, but is performed by a device at the same I/O port address location. In the CPC464, CPC664 and KC compact, this function is performed in a memory-expansion (e.g. Dk'Tronics 64K RAM Expansion), if this expansion is not present then the function is not available. In the CPC6128, this function is performed by a [[PAL16L8|PAL ]] located on the main PCB, or a memory-expansion. In the 464+ and 6128+ this function is performed by the ASIC or a memory expansion. Please read the document on RAM management for more information.
==== Register 0 - Palette Index (Pen selection ==) ==
When bit 7 and bit 6 are set to "0", the remaining bits determine which pen is to have its colour changed. When bit 4 is set to "0", bits 3 to 0 define which pen is to be selected. When bit 4 is set to "1", the value contained in bits 3-0 is ignored and the border is selected.
Each mode has a fixed number of pens. Mode 0 has 16 pens, mode 1 has 4 pens and mode 2 has 2 pens.
===== Summary =====
{|{{Prettytable|width: 700px; font-size: 2em;}}
|}
==== Register 1 - Palette Data (Colour selection ==) ==
Once the pen has been selected its colour can then be changed. Bits 4 to 0 specify the hardware colour number from the hardware colour palette.
Even though there is provision for 32 colours, only 27 are possible. The remaining colours are duplicates of those already in the colour palette.
===== Summary =====
{|{{Prettytable|width: 700px; font-size: 2em;}}
|}
=== Register 2 - Select screen mode and ROM configuration ===
This is a general purpose register responsible for the [[Video modes|screen mode]] and the ROM configuration.
==== Screen mode selection ====
The function of bits 1 and 0 is to define the screen mode. The settings for bits 1 and 0 and the corresponding screen mode are given in the table below.
Mode changing is synchronised with HSYNC. If the mode is changed, it will take effect from the next HSYNC.
==== ROM configuration selection ====
Bit 2 is used to enable or disable the lower ROM area. The lower ROM area occupies memory addresses &0000-&3fff and is used to access the operating system ROM. When the lower ROM area is is enabled, reading from &0000-&3FFF will return data in the ROM. When a value is written to &0000-&3FFF, it will be written to the RAM underneath the RAM. When it is disabled, data read from &0000-&3FFF will return the data in the RAM.
Bit 4 controls the interrupt generation. It can be used to delay interrupts. See the document on interrupt generation for more information.
===== Summary =====
{|{{Prettytable|width: 700px; font-size: 2em;}}
| 0 || x
|}
 
== Register 3 - RAM Banking ==
 
This register exists only in CPCs with 128K RAM (like the CPC 6128, or CPCs with [[Standard Memory Expansions]]). Note: In the CPC 6128, the register is a separate [[PAL16L8|PAL]] that assists the Gate Array chip.
 
{|{{Prettytable|width: 700px; font-size: 2em;}}
|-
| ''Bit'' || ''Value'' || ''Function''
|-
| 7 || 1 || rowspan="2" | Gate Array function 3
|-
| 6 || 1
|-
| 5 || b || rowspan="3" |64K bank number (0..7); always 0 on an unexpanded CPC6128, 0-7 on [[Standard Memory Expansions]]
|-
| 4 || b
|-
| 3 || b
|-
| 2 || x || rowspan="3" | RAM Config (0..7)
|-
| 1 || x
|-
| 0 || x
|}
 
 
The 3bit RAM Config value is used to access the second 64K of the total 128K RAM that is built into the CPC 6128 or the additional 64K-512K of standard memory expansions. These contain up to eight 64K ram banks, which are selected with bit 3-5. A standard CPC 6128 only contains bank 0. Normally the register is set to 0, so that only the first 64K RAM are used (identical to the CPC 464 and 664 models). The register can be used to select between the following eight predefined configurations only:
 
-Address- 0 1 2 3 4 5 6 7
0000-3FFF RAM_0 RAM_0 '''RAM_4''' RAM_0 RAM_0 RAM_0 RAM_0 RAM_0
4000-7FFF RAM_1 RAM_1 '''RAM_5''' '''RAM_3''' '''RAM_4''' '''RAM_5''' '''RAM_6''' '''RAM_7'''
8000-BFFF RAM_2 RAM_2 '''RAM_6''' RAM_2 RAM_2 RAM_2 RAM_2 RAM_2
C000-FFFF RAM_3 '''RAM_7''' '''RAM_7''' '''RAM_7''' RAM_3 RAM_3 RAM_3 RAM_3
 
The Video RAM is always located in the first 64K, VRAM is in no way affected by this register.
== Programming the Gate Array - Examples ==
RET
</pre>
 ==== Conversion chart =Misc ===
The hardware colour number is different to the colour range used by the firmware, so a conversion chart is provided for the corresponding firmware/hardware colour values and the corresponding colour name.
===== Note =====
The firmware keeps track of the colours it is using. Every VSYNC (assuming interrupts are enabled) the firmware sets the colours. This enables the user to have flashing colours. If the user selects a new colour using the gate array, the new colour will flash temporarily and then return to its original colour. This is due to the firmware resetting the colour. When using the firmware, use its routines to select the colour, and the colour will remain.
Example: [For whatever reason, this example does NOT refer to the above firmware stuff]
<pre>ld bc,7f00+1&nbsp;;Gate array function (set pen)
;and pen number
</pre>
==== Palette R,G,B definitions ====
There are 27 colours which are generated from red, green and blue mixed in different quantities. There are 3 levels of red, 3 levels of green and 3 levels of blue, and these can be thought of as off/no colour, half-on/half-colour, and on/full-colour.
To display a CPC image you will need to use a analogue monitor with a composite sync.
This table shows the relationship between hardware colour number, colour name and RGB mixing.  <br>=== Palette sorted by Hardware Colour Numbers ===
{| class="FCK__ShowTableBorders"
|-
| ''Hardware Colour Index'' Number||Firmware Number|| ''Colour Name'' | ''R&nbsp;%'' || ''G&nbsp;%'' || ''B&nbsp;%'' || ''Colour''
|-
| 0 (40h) || 13 || White | align="right" | 50 | align="right" | 50 | align="right" | 50 || bgcolor="#808080" |
|-
| 1 (41h) || (13) || White | align="right" | 50 | align="right" | 50 | align="right" | 50 || bgcolor="#808080" |
|-
| 2 (42h) || 19 || Sea Green | align="right" | 0 | align="right" | 100 | align="right" | 50 || bgcolor="#00ff80" |
|-
| 3 (43h) || 25 || Pastel Yellow | align="right" | 100 | align="right" | 100 | align="right" | 50 || bgcolor="#ffff80" |
|-
| 4 (44h) || 1 || Blue | align="right" | 0 | align="right" | 0 | align="right" | 50 || bgcolor="#000080" |
|-
| 5 (45h) || 7 || Purple | align="right" | 100 | align="right" | 0 | align="right" | 50 || bgcolor="#ff0080" |
|-
| 6 (46h) || 10 || Cyan | align="right" | 0 | align="right" | 50 | align="right" | 50 || bgcolor="#008080" |
|-
| 7 (47h) || 16 || Pink | align="right" | 100 | align="right" | 50 | align="right" | 50 || bgcolor="#ff8080" |
|-
| 8 (48h) || (7) || Purple | align="right" | 100 | align="right" | 0 | align="right" | 50 || bgcolor="#ff0080" |
|-
| 9 (49h) || (25) || Pastel Yellow | align="right" | 100 | align="right" | 100 | align="right" | 50 || bgcolor="#ffff80" |
|-
| 10 (4Ah) || 24 || Bright Yellow | align="right" | 100 | align="right" | 100 | align="right" | 0 || bgcolor="#ffff00" |
|-
| 11 (4Bh) || 26 || Bright White | align="right" | 100 | align="right" | 100 | align="right" | 100 || bgcolor="#ffffff" |
|-
| 12 (4Ch) || 6 || Bright Red | align="right" | 100 | align="right" | 0 | align="right" | 0 || bgcolor="#ff0000" |
|-
| 13 (4Dh) || 8 || Bright Magenta | align="right" | 100 | align="right" | 0 | align="right" | 100 || bgcolor="#ff00ff" |
|-
| 14 (4Eh) || 15 || Orange | align="right" | 100 | align="right" | 50 | align="right" | 0 || bgcolor="#ff8000" |
|-
| 15 (4Fh) || 17 || Pastel Magenta | align="right" | 100 | align="right" | 50 | align="right" | 100 || bgcolor="#ff80ff" |
|-
| 16 (50h) || (1) || Blue | align="right" | 0 | align="right" | 0 | align="right" | 50 || bgcolor="#000080" |
|-
| 17 (51h) || (19) || Sea Green | align="right" | 0 | align="right" | 100 | align="right" | 50 || bgcolor="#00ff80" |
|-
| 18 (52h) || 18 || Bright Green | align="right" | 0 | align="right" | 100 | align="right" | 0 || bgcolor="#00ff00" |
|-
| 19 (53h) || 20 || Bright Cyan | align="right" | 0 | align="right" | 100 | align="right" | 100 || bgcolor="#00ffff" |
|-
| 20 (54h) || 0 || Black | align="right" | 0 | align="right" | 0 | align="right" | 0 || bgcolor="#000000" |
|-
| 21 (55h) || 2 || Bright Blue | align="right" | 0 | align="right" | 0 | align="right" | 100 || bgcolor="#0000ff" |
|-
| 22 (56h) || 9 || Green | align="right" | 0 | align="right" | 50 | align="right" | 0 || bgcolor="#008000" |
|-
| 23 (57h) || 11 || Sky Blue | align="right" | 0 | align="right" | 50 | align="right" | 100 || bgcolor="#0080ff" |
|-
| 24 (58h) || 4 || Magenta | align="right" | 50 | align="right" | 0 | align="right" | 50 || bgcolor="#800080" |
|-
| 25 (59h) || 22 || Pastel Green | align="right" | 50 | align="right" | 100 | align="right" | 50 || bgcolor="#80ff80" |
|-
| 26 (5Ah) || 21 || Lime | align="right" | 50 | align="right" | 100 | align="right" | 0 || bgcolor="#80ff00" |
|-
| 27 (5Bh) || 23 || Pastel Cyan | align="right" | 50 | align="right" | 100 | align="right" | 100 || bgcolor="#80ffff" |
|-
| 28 (5Ch) || 3 || Red | align="right" | 50 | align="right" | 0 | align="right" | 0 || bgcolor="#800000" |
|-
| 29 (5Dh) || 5 || Mauve | align="right" | 50 | align="right" | 0 | align="right" | 100 || bgcolor="#8000ff" |
|-
| 30 (5Eh) || 12 || Yellow | align="right" | 50 | align="right" | 50 | align="right" | 0 || bgcolor="#808000" |
|-
| 31 (5Fh) || 14 || Pastel Blue | align="right" | 50 | align="right" | 50 | align="right" | 100 || bgcolor="#8080ff" |
|}
===Palette sorted by Firmware Colour Numbers = RGB assignments for the software colours ==== This is simply a side note to illustrate a pattern in the RGB assignments of the software colours and to show how their value is calculated.
{| class="FCK__ShowTableBorders"
| ''R&nbsp;%'' || ''G&nbsp;%'' || ''B&nbsp;%'' || ''Colour''
|-
| 0 || 54h ||Black || 0|| 0|| 0|| bgcolor="#000000" |||-| 1 || 44h (or 50h) ||Blue || 0|| 0|| 50|| bgcolor="#000080" |||-| 2 || 55h ||Bright Blue || 0|| 0||100|| bgcolor="#0000ff" |||-| 3 || 5Ch ||Red || 50|| 0|| 0|| bgcolor="#800000" ||-| 4 || 58h ||Magenta || 50|| 0|| 50|| bgcolor="#800080" ||-| 5 || 5Dh || Mauve || 50|| 0||100|| bgcolor="#8000ff" ||-| 6 || || Bright Red || 100 || 0 || 0 || bgcolor="#ff0000" ||-| 7 || || Purple || 100 || 0 || 50 || bgcolor="#ff0080" ||-| 8 | Bright Magenta | 100 | 0 | 100 | bgcolor="#ff00ff" |
|-
| 9 1| Green | 44h (or 50h) ||Blue || 0 | 50 | 0 || 50|| bgcolor="#008000000080" |
|-
| 10 2| Cyan | 55h ||Bright Blue || 0 | 50 | 50 0||100|| bgcolor="#0080800000ff" |
|-
| 11 3| Sky Blue | 0 5Ch ||Red || 50 | 100 | 0|| 0|| bgcolor="#0080ff800000" |
|-
| 12 4| Yellow | 50 58h ||Magenta || 50 | | 0 || 50|| bgcolor="#808000800080" |
|-
| 13 5| White | 50 5Dh ||Mauve | 50 | 50 || 0||100|| bgcolor="#8080808000ff" |
|-
| 14 6| Pastel Blue | 50 4Ch ||Bright Red | 50 | 100 || 0|| 0|| bgcolor="#8080ffff0000" |
|-
| 15 7|| 45h (or 48h) ||Purple | Orange | 100 | 50 | 0 || 50|| bgcolor="#ff8000ff0080" |
|-
| 16 8|| 4Dh ||Bright Magenta | Pink | 100 | 50 | 50 0||100|| bgcolor="#ff8080ff00ff" |
|-
| 17 9| Pastel Magenta | 100 56h ||Green || 0|| 50 | 100 | 0|| bgcolor="#ff80ff008000" |
|-
| 18 10| Bright Green | 0 46h | 100 | Cyan || 0 || 50|| 50|| bgcolor="#00ff00008080" |
|-
| 19 11| Sea Green | 57h ||Sky Blue || 0 | 100 | 50 ||100|| bgcolor="#00ff800080ff" |
|-
| 20 12| Bright Cyan | 0 5Eh | 100 | 100 Yellow || 50|| 50|| 0|| bgcolor="#00ffff808000" |
|-
| 21 13|| 40h (or 41h) ||White | Lime | 50 | 100 | 0 50|| 50|| bgcolor="#80ff00808080" |
|-
| 22 14|| 5Fh || Pastel Green Blue || 50 | 100 | 50 ||100|| bgcolor="#80ff808080ff" |
|-
| 23 15| Pastel Cyan | 50 4Eh ||Orange | 100 | 100 || 50|| 0|| bgcolor="#80ffffff8000" |
|-
| 24 16| Bright Yellow | 100 47h ||Pink || 100 | 0 | 50|| 50|| bgcolor="#ffff00ff8080" |
|-
| 25 17|| 4Fh || Pastel Yellow Magenta | 100 | 100 || 50 ||100|| bgcolor="#ffff80ff80ff" |
|-
| 26 18|| 52h ||Bright Green || 0||100|| 0||bgcolor="#00ff00"||-|19|| 42h (or 51h) ||Sea Green || 0||100|| 50||bgcolor="#00ff80"||-|20|| 53h || Bright White Cyan || 0||100||100||bgcolor="#00ffff"||-|21|| 5Ah ||Lime || 50|| 100 || 0||bgcolor="#80ff00"||-|22|| 59h ||Pastel Green || 50|| 100 || 50||bgcolor="#80ff80"||-|23|| 5Bh ||Pastel Cyan || 50|| 100 ||100||bgcolor="#80ffff"||-|24|| 4Ah ||Bright Yellow ||100||100|| 0||bgcolor="#ffff00"||-|25|| 43h (or 49h) ||Pastel Yellow ||100||100|| 50||bgcolor="#ffff80"||-|26|| 4Bh ||Bright White ||100||100||100|| bgcolor="#ffffff" |
|}
=== Intensities === The 0%, 50%, and 100% values in the above tables are "should-be" values. However, the real hardware doesn't exactly match that intensities. The actual intensities depend on the luminance mixing (R,G,B tied together via resistors), on chipset (classic CPC, or newer ASIC ones), and on the load applied by external hardware (Monitor, or TV set).* [[CPC Palette]] - some more details === To calculate the colour value =====
'''Red'''
100% =&gt; add 2
=== Green Screen Colours ===
On a green screen (where all colours are shades of green), the colours (in the software/firmware colours), are in order of increasing intensity. Black is very dark, and white is bright green, and colour 13 is a medium green. (Thanks to [[Mark Rison|Mark Rison]] for this information)
==LinksPictures == <gallery>Image:40010_am2_metal.jpg|40010 GA Metal LayerImage:40010_am2_acid.jpg|40010 GA with Metal Layer removedImage:40226_am4_metal.jpg|40226 PreASIC Metal Layer</gallery> ==See also== *[[Gate Array and ASIC Pin-Outs]]
*[[Video modes]] : for other informations on colours and pixels.
*[[Synchronising with the CRTC and display]] : technical details on the relationship between Gate Array and CRTC.
*[[Media:40010-simplified V03.pdf]] [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/gate-array-decapped!/msg170713/#msg170713 Forum thread] Gate Array schematics - reverse engineered by Gerald == External links ==* [https://www.grimware.org/doku.php/documentations/devices/gatearray Gate Array documentation from Grimware]* [http://quasar.cpcscene.net/doku.php?id=assem:gate_array Quasar Gate Array documentation (in french)] [[Category:Hardware]][[Category:Programming]][[Category:Datasheet]][[Category:Graphic]][[Category:CPC Internal Components]][[Category:Electronic Component]]
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