I explode into a task by component, so the schematics is big.
Starter kit use only one RAM physical component for RAM ROM and DSK, so I had to manage accesses (it is possible in fact because a Z80 is a sequential processor)
My clock take 4 wires, in fact it exists a clock sequence (during 1 z80 tic, I do several think). Perhaps I have to explain a few about this point of view.
I don't know if I forget another thing by there....
RAM is done for being dump
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== Components ==