Changes

FPGAmstrad

19 bytes added, 18:27, 28 July 2018
/* Z80: Some bad instruction timing analysis */
Based on [[http://www.winape.net/ WinAPE>download>Plus test>plustest.dsk]] testbench, mapped using [[http://clrhome.org/table/ Z80 instruction set - ClrHome]], instruction described then in [[http://www.zilog.com/docs/z80/um0080.pdf Z80 doc]], against [[http://www.winape.net/ WinAPE]] passing testbench timing.
Solved in r005.8.16.3(WAIT_n generator)
==== Z80: Some bad instruction analysis ====
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