== General Instruments - AY-3-8910, AY-3-8912, AY-3-8913Programmable Sound Generator ==
=== FEATURES ===
Since most applications of a microprocessor/PSG system would also require interfacing between the outside world and the microprocessor, this facility has been designed into the PSG. The AY-3-8910 has two general purpose 8-bit I/O ports and is supplied in a 40 lead package; the AY-3-8912 has one port and 28 leads; the AY-3-8913 has no ports and 24-leads.
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== PIN CONFIGURATIONS== === 40 LEAD DUAL IN LINE===
AY-3-8910
=== 28 LEAD DUAL IN LINE===
AY-3-8912
=== 24 LEAD DUAL IN LINE===
AY-3-8913
-------------------------------------------------------------------------------- == PIN FUNCTIONS ==
DA7--DA0 (input/output/high impedance) pins 30--37 (AY-3-8910) pins 21--28 (AY-3-8912) pins 4--11 (AY-3-8913)
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== ARCHITECTURE==
The AY-3-8910/8912/8913 is a register oriented Programmable Sound Generator (PSG). Communication between the processor and the PSG is based on the concept of memory-mapped I/O. Control commands are issued to the PSG by writing to 16 memory-mapped registers. Each of the 16 registers within the PSG is also readable so that the microprocessor can determine, as necessary, present states or stored data values.
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== REGISTER ARRAY==
The principle element of the PSG is the array of 16 read/write control registers. These 16 registers look to the CPU as a block of memory and as such occupy a 16 word block out of 1,024 possible addresses. The 10 address bits (8 bits on the common data/address bus, and 2 seperate address bits A8 and /A9) are decoded as follows:
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== SOUND GENERATING BLOCKS==
The basic blocks in the PSG which produce the programmed sounds include:
== I/O PORTS ==
Two additional blocks are shown in the PSG Block Diagram which have nothing directly to do with the production of sound --these are the two I/O ports (A and B). Since virtually all uses of microprocessor-based sound would require interfacing between the outside world and the processor, this facility has been included in the PSG. Data to/from the CPU bus may be read/written to either of two 8-bit I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912; no ports are available on the AY-3---------------------------------------------------------------------8913.
I/O PORTSTwo additional blocks are shown in the PSG Block Diagram which have nothing directly to do with the production of sound -- these are the two I/O ports (A and B). Since virtually all uses of microprocessor-based sound would require interfacing between the outside world and the processor, this facility has been included in the PSG. Data to/from the CPU bus may be read/written to either of two 8-bit I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912; no ports are available on the AY-3-8913. == PSG BLOCK DIAGRAM==
OPERATION
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OPERATION
Since all functions of the PSG are controlled by the processor via a series of register loads, a detailed description of the PSG operation can best be acomplished by relating each PSG function to the control of its corresponding register. The function of creating or programming a specific sound or sound effect logically follows the control sequence listed:
Operation Registers Function
Tone Generator Control R0--R5 Program tone periods.
Noise Generator Control R6 Program noise period.
Amplitude Control R10--R12 Select "fixed" or "envelope-variable" amplitudes.
Envelope Generator Control R13--R15 Program envelope period and select envelope pattern.
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Tone Generator Control (Registers R0,R1,R2,R3,R4,R5)