3. CRTC type 4 is the same as CRTC type 3. The registers also repeat as they do on the type 3.
== UM6845R status register ==
The UM6845R has a status register that can be read using port &BExx.
Bit 6 is set to 1 if there is a strobe input to the /LPEN signal. It is cleared to 0 when either R17 or R16 (LPEN address) of the CRTC are read. It signals there is a valid LPEN input. On my CPC (arnoldemu) with UM6845R, it is triggered at power on, R17 and R16 have the values 0 when read.
Bit 5 is set to 1 when CRTC is in "vertical blanking". Vertical blanking is when the vertical border is active. i.e. VCC>=R6.
It is cleared when the frame is started (VCC=0). It is not directly related to the DISPTMG output (used by the CPC to display the border colour) because that output is a combination of horizontal and vertical blanking.
This bit will be 0 when pixels are being displayed.
All the other bits read as 0 and don't appear to have any function (they may have functions on other CRTCs that have a status register).
== Datasheets ==