[[File:CPC6320_schematics.jpg|thumbnail|none|CPC 6320 - schematics]]
=== Warning / Disclaimer ===
Although I have taken the utmost care preparing this documentation, I am no electronics engineer and did this only as a hobby project. I do not guarantee that it is error free and I accept no responsibility for damage to anyone’s hardware or other personal equipment or injury inflicted on you or others.
== Construction of the 320K version (no PAL programming required) ==
The required logic can either be built on a slim breadboard or with the help of a PCB that plugs into the PAL socket.
'''when using a PCB:'''
* The PCB - [https://www.cpcwiki.eu/imgs/4/40/CPC6320_Gerber.zip PCB Gerber files]
* 2x Pin header 1x10
* 4x capacitor 100nF
* solder the PAL IC socket and the pin headers to backside of the PCB. The pin headers will later be pushed into the PAL socket on the motherboard. make sure they have quite the right length as if they are too long, there might not be enough headroom above the PCB for the keyboard and if they are too short, the connection might suffer.
* connect chipA8 to one of the A8 pins of the new RAM chips and CASADR, D3 and D4 to appropriate connection points on the motherboard. The diagrams show some options. If you have mainboard with soldering points for the two different gate array versions, it's the most easiest way to use the soldering points there. Otherwise connections to IC pins are probably the easiest way.
* Remove the PAL chip from the socket on the motherboard (it's located right to the RAM banks, the 20pin IC in the socket) and insert it into the socket on the backside of the add-on PCB. Make sure you align its direction correctly . (Printed on PCB, Pin must face towards the pins of the IC next to it)
* Finally insert the PCB into the PAL socket on the motherboard. Make sure it's properly inserted.
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== Construction of the 512K version (PAL programming required) ==
For a 512K version the biggest challenge is, that when we replace also the first bank we must treat the first 64K as base RAM and the other 192K as extended RAM in a way that it is properly recognised by software.
While this can be done with logic ICs it would need to much space to properly fit into a normal CPC6128. Instead this is achieved with two PAL ICs. ATF16V8 ICs are easy to find and relatively cheap but need to be programmed with e.g. an Eprom programmer like the widely available TL866-II.
What you need:
* The PCB - [https://www.cpcwiki.eu/imgs/7/70/CPC6512_Gerber.zip PCB Gerber files]
* 2x Pin header 1x10
* 2x capacitor 100nF
* 2x ATF16V8 (or other PAL16L8 compatible ICs) - [https://www.cpcwiki.eu/imgs/f/f7/CPC_6512jed.zip JED files]
The assembly is pretty much identical to the PCB description above with the following changes:
* replace both RAM banks with 41256 RAM ICs
* connect all A8 pins on both banks so that all 16 ICs are fully parallel on all address lines.
* program two ATF16V8 ICs with the attached JED files and solder them to the PCB
* There is a connection from the PCB to D5. D5 is e.g. pin 29 on the 40007 socket. For other options check the schematics/Pinouts.
Note: It's also possible to use this PCB for a 320K mod. In that case only replace the second (left) RAM bank and connect the D5 pad to GND (through hole directly next to the D5 pad).
[[File:CPC6512 1.jpg|thumbnail|left]] [[File:CPC6512 2.jpg|thumbnail|right]] [[File:CPC6512 3.jpg|thumbnail|none]]
PAL1:
<small><pre>
/* *************** INPUT PINS *********************/
PIN 1 = Q0 ; /* */
PIN 2 = RAMDIS ; /* */
PIN 3 = Q1 ; /* */
PIN 4 = Q2 ; /* */
PIN 5 = Q3 ; /* */
PIN 6 = Q4 ; /* */
PIN 7 = Q5 ; /* */
PIN 8 = A15 ; /* */
PIN 9 = A14 ; /* */
PIN 11 = nCPU ; /* */
PIN 15 = nCASADR ; /* */
PIN 16 = nCAS ; /* */
/* *************** OUTPUT PINS *********************/
PIN 12 = A15OUT ; /* */
PIN 13 = BANKING ; /* */
PIN 14 = A8 ; /* */
PIN 17 = nCAS1 ; /* */
PIN 18 = nCAS0 ; /* */
PIN 19 = A14OUT ; /* */
A14OUT = !( !A14
# !A15 & !Q0 & Q2 );
A15OUT = !( !A15 & !A14
# !A15 & !Q1
# !A15 & !Q0 & !Q2 );
nCAS0 = ( nCAS
# !nCAS1
# !nCPU & nCAS0 & RAMDIS
# !nCPU & nCAS0 & BANKING & !Q5
);
BANKING = ( !A15 & A14 & Q2
# A15 & A14 & Q0 & !Q2
# !Q0 & Q1 & !Q2);
nCAS1 = !( !nCAS & nCAS0 & !nCPU & !A15 & A14 & Q2 & !Q5 & !RAMDIS
# !nCAS & nCAS0 & !nCPU & A15 & A14 & Q0 & !Q2 & !Q5 & !RAMDIS
# !nCAS & nCAS0 & !nCPU & !Q0 & Q1 & !Q2 & !Q5 & !RAMDIS
# !nCAS & nCAS0 & !A15 & A14 & Q2 & !Q5 & !nCAS1
# !nCAS & nCAS0 & A15 & A14 & Q0 & !Q2 & !Q5 & !nCAS1
# !nCAS & nCAS0 & !Q0 & Q1 & !Q2 & !Q5 & !nCAS1 );
A8 = ( Q5 & BANKING & !Q3 & !nCASADR & !nCPU
# Q5 & BANKING & !Q4 & nCASADR & !nCPU
# Q5 & BANKING & Q3 & Q4 & !nCPU
# !Q5 & BANKING & Q3 & !nCASADR & !nCPU
# !Q5 & BANKING & Q4 & nCASADR & !nCPU
);
</pre></small>
PAL2:
<small><pre>
/* *************** INPUT PINS *********************/
PIN 1 = D6D7 ; /* */
PIN 2 = D0 ; /* */
PIN 3 = nRESET ; /* */
PIN 4 = D1 ; /* */
PIN 5 = D2 ; /* */
PIN 6 = D3 ; /* */
PIN 7 = D4 ; /* */
PIN 8 = D5 ; /* */
PIN 9 = A15 ; /* */
PIN 11 = nIOWR ; /* */
/* *************** OUTPUT PINS *********************/
PIN 13 = Q5 ; /* */
PIN 14 = Q4 ; /* */
PIN 15 = Q3 ; /* */
PIN 16 = Q2 ; /* */
PIN 17 = Q1 ; /* */
PIN 18 = Q0 ; /* */
Q0 = ( nRESET & D6D7 & !A15 & !nIOWR & D0
# nRESET & !D6D7 & Q0
# nRESET & A15 & Q0
# nRESET & nIOWR & Q0 );
Q1 = ( nRESET & D6D7 & !A15 & !nIOWR & D1
# nRESET & !D6D7 & Q1
# nRESET & A15 & Q1
# nRESET & nIOWR & Q1 );
Q2 = ( nRESET & D6D7 & !A15 & !nIOWR & D2
# nRESET & !D6D7 & Q2
# nRESET & A15 & Q2
# nRESET & nIOWR & Q2 );
Q3 = ( nRESET & D6D7 & !A15 & !nIOWR & D3
# nRESET & !D6D7 & Q3
# nRESET & A15 & Q3
# nRESET & nIOWR & Q3 );
Q4 = ( nRESET & D6D7 & !A15 & !nIOWR & D4
# nRESET & !D6D7 & Q4
# nRESET & A15 & Q4
# nRESET & nIOWR & Q4 );
Q5 = ( nRESET & D6D7 & !A15 & !nIOWR & D5
# nRESET & !D6D7 & Q5
# nRESET & A15 & Q5
# nRESET & nIOWR & Q5 );
</pre></small>
== References and links ==
* [https://www.cpcwiki.eu/imgs/4/40/CPC6320_Gerber.zip PCB Gerber files - 320K version]
* [https://www.cpcwiki.eu/imgs/7/70/CPC6512_Gerber.zip PCB Gerber files - 512K version/PAL]
* [[C't 512 KB internal RAM expansion|C't 512 KB internal RAM expansion]]