Changes

Upgrade of [[Category:DIY]] [[Category:Memory expansions]]A project to upgrade a CPC6128 to 512K RAM (total), done by replacing the CPC 6128CPC6128's internal RAM to 512 KiB as proposed in chips, and its PAL banking chip, the article '''Aus David wird Goliath: 512 KB RAM für Schneider CPC''' project was released 1987 in issue 10/1987, pages 156 to 162 of the German IT german magazine '''c'tMagazin'''. The DIY project name is '''CPC 6512'''. The mod requires to remove (or disable) the sixteen RAM chips on the CPC6128 mainboard, and to replace them by bigger chips, plus whatever additional bank selection logic.

The memory is accessed via Port 7Fxxh, as on [[Standard Memory Expansions]]* '''PAL Replacement''' - Replace the old PAL (IC118) by the new daughterboard. Since Most signals connect to the internal RAM is removed, its total capacity is only 512K PAL socket (unlike standard 512K expansions which provide 64K internal plus 512K external memorygreen in schematic), ie. 576K totala extra few wires connect elsewhere on mainboard (red). Altogether, as an optional "bonus" feature, the c't expansion works like circuit contains logic for a 448K dk'tronics expansion 3rd floppy drive (leaving the banks selected via OUT [7Fxxh],FCh..FFh unusedblue).

One half (256K) of the total (512K) expansion memory can be accessed as Video RAM (with normal expansions, only 64 KB are accessible as VRAM)<gallery>File:CPC6512 ct magazin schematic. This is making the expansion slightly incompatible with the dk'tronics standardpng|SchematicFile:CPC6512 ct magazin pcb. However, usually expansion memory is mapped to 4000h-7FFFh, whilst VRAM is usually mapped to C000h-FFFFh. So, most existing software may work with it, without accidently displaying garbage on the screen. == Installation Guide ==jpg|PCB=== Components ===</gallery>

* The bank selection for CPU address expansion seems to have been designed independently of [[Standard Memory Expansions]] like the dk'tronics one. So, there is no (intended) compatibility. However, both c't and dk'tronics are designed around the CPC6128 banking mechanism, so they do work similar in some ways. Namely, both can map expansion banks to 4000h..7FFFh does also affect bank bits0-1 for VRAM at , but there are several differences:** For the mapping to 4000h..7FFFh; thus the CRTC may see bank 0-3 , dk'tronics uses values CCh..CFh, D4h..C7h, DCh..DFh, ... FCh..FFh whilst c't uses values C8h..DFh. Some of these values do overlap, resulting in that region some (whilstunintended) semi-compatibility, as far as knownbut there's still one big difference: along with the above values, on a normal CPCdk'tronics maps bank 3 to C000h..FFFFh, it should always see whilst c't maps bank 1 in 7 to that region).

== Missing Info Memory Configurations ==

* Unknown which banks are usable as VRAM** The first four 16K bank memory is controlled by OUT [7Fxxh],C0h..DFh instructions. Values C0h..C7h are (probably) usuable as VRAM (working same as on all 64K CPC models)** The next four 16K bank are (hopefully) not usuable as VRAM (for CP/M+ compatibility, which uses them as Work normal CPC6128s. Values C8h..DFh do access the additional RAM)** For further banks it's totally unknown if they are used as VRAM or not* Unknown if it's fully dk'tronics compatible, or more like incompletely implemented Inicron (C8h..D3h when using the cut-down 320K upgrade variant* Unknown what happens on accessing the unused region via OUT [7Fxxh],FCh.).FFh == Memory Configurations ==

Having a short look at Some notes on the article, it seems to be all different as than expectedsyntax: * There is no dk'tronics compatibility intended The first two lines assign the pin- however, c't and dk'tronics outs. Observe that leading "/" slashes are based on the CPC6128 banking mechanismomitted here. For example, so they work similar, and to some level there is some "/CPU" (unintendedin schematic) becomes "CPU" (in source code) compatibility. Namely, ONE HALF of the memory can Accordingly "/CPU" (in source code) would be accessed double-negated "//CPU" aka "CPU" (in dk'tronics style fashionschematic). * There seems to be no hardware based The "Video RAMIF (condition) signal=" support at allpart means that "signal" becomes an output when condition is true. HoweverIn the above source code, there's some unspectacular software based example included condition is always true (VCC), or, for the last 2 lines, always false (GND).* The "*" and "+" operators are meaning "* = AND", "+ = OR". The idea behind that copies expansion RAM confusing syntax was to VRAM via LDIR opcodemake it "easier" to learn for people who are trained only in basic maths (the formulas do also work when treating *=multiply, and +=plus. For example: 1+0+1+1 = 3 = nonzero = true).* There must be some priority ordering in the formulas: Either * before +, or operations inside of a line before merging the results of the separate lines (in above examples, both ordering methods do work).

 * [http[CPC_6320_/_CPC_6512_-_internal_320K_/_512K_for_CPC_6128|CPC 6320 / CPC 6512 (by eto) - similar logic, but fully standards compatible]]* [https://cpcwiki.eu/forum/index.php/topic,662.msg7113.html#msg7113 Bank Swapper by Khany/Cherry-T] (less complex: bank-exchanging toggle, no memory expansion; 1993)