[[Image:Inside GX4000 cart 1.jpg|frame|right|ACID protection chip within a cartridge (bottom)]]
The '''ACID''' (Amstrad Cartridge Identification Device) protection chip is used in the [[GX4000 cartridge|cartridges]] of the [[Plus]] series and the [[GX4000]] game console. After Nocash decrypted the internal algorithms it is possible to replace the protection chip with a complex programmable logic device (CPLD).
if PinCCLR=0 then ShiftReg=1FFFFh ;\done at falling CLK edge
PinSIN=ShiftRegBit0 ;/
;Mind that above is a software example - a hardware solution obviously
;wouldn't require CmpVal and XorVal registers - instead, hardware would
;directly deal with the PinAx (or NOT PinAx) signals.
Replacing or overwriting the EPROM in existing cartridges is easy, so the ACID doesn't prevent piracy or homebrew programming. However, it prevents commercial developers from producing unlicensed cartridges.
* CLK is known to be 4MHz, and SIN is known to be updated on falling edge of CLK, as seen on [[Media:ACID-SIN.jpg|this picture]].
* Judging from the ACID chip, /CCLR is checked on falling edge of CLK. However, juding from [[Media:ACID-CCLR.png| this picture]], /CCLR is ''changing'' on falling edge of CLK. If this is true (the picture resolution isn't perfect), then it's unclear how the ACID can interprete /CCLR in a stable way while it's changing. Possibly, it can't do that at all (ie. it might act unstable, and the CPC+ might need to retry sending /CCLR several times).
** '''WANTED:''' A picture showing CLK and /CCLR without ACID connected (at better resolution) would help!** A picture showing CLK and /CCLR with ACID connected would be nice, too (trigerred on the LAST /CCLR coming from the CPC)is [[Media:ACID Init by Grim.png|found here]].
* The /CE timing is still unknown, too. The ACID might check A0-A7 on raising or falling edge of /CE. Or, on raising or falling edge of CLK while /CE being LOW. Or at whatever other time.
** '''WANTED:''' A picture showing CLK and /CE would help!** '''WANTED:''' Best also showing one or more of the A0-A7 signals. <gallery>Image:ACID Init by Grim.png|/RESET, CLK, CCLR, SIN (init sequence)Image:ACID-SIN.jpg|CLK and SINImage:ACID-CCLR.png|CLK and CCLR (and some offtopic signals) (from CPC, without ACID connected)</gallery>
== Pinout ==
Note: The two GND pins are interconnected with each other (inside of the chip). The NC pin seems to be always high.
== Clones ==
* An ACID replacement using a Xilinx XC9536 CPLD and some [[Verilog implementation of the ACID chip|Verilog code]] based on nocash's reverse engineering work has been built by [[Octoate]] and [[Nilquader]].
* Miguel Angel (aka mcleod_ideafix) has published all the info about his implementation of the ACID in a CPLD, verilog sources included [http://www.zxprojects.com/index.php/analisis-del-chip-acid/62-analisis-del-chip-acid-del-amstrad-cpcgx4000]
* It's possible to use the CPC+ without ACID by exploiting a timing bug in the CPC+/GX4000-ASIC Chip. (Developed by [[Nilquader]])
<gallery caption="Running CPC+ without ACID">
Image:NoAcid.jpg|GX4000 running without ACID
Image:NoAcid_sch.png|Schematics
</gallery>
== Pictures ==
* ACID chip decapped. Many thanks to Sean Riddle!
<gallery>
Image:40908_Metal_Small.jpg
</gallery>
== Misc ==
[[Category:Hardware]][[Category:Cartridges| ]][[Category:CPC Plus]][[Category:CPC Internal Components]][[Category:Amstrad Products]][[Category:Electronic Component]]