== Aleste RAM Mapper ==
Bits Four I/O ports control the mapper:{|{{Prettytable|width: 700px; font-size: 2em;}}|'''I/O'''||'''Decoded as'''||'''Page'''||'''Memory region'''|-|#7CXX||%0xxxxx00 xxxxxxxx||page 0||&0000-&3fff|-|#7DXX||%0xxxxx01 xxxxxxxx||page 1||&4000-&7fff|-|#7EXX||%0xxxxx10 xxxxxxxx||page 2||&8000-&bfff|-|#7FXX||%0xxxxx11 xxxxxxxx||page 3||&c000-&ffff|} The decoding of the I/O port for the mapper uses bit 15 of the I/O address in the same way as the Aleste "Gate Array". Bit 9,8 define which page. To avoid writing to the Aleste "Gate-Array" bits 7 and 6 of the data must be 1 . The remaining bits define the RAM block/configuration to use. In CPC mode, writing to the mapper changes the RAM configuration for all pages, with the memory configuration being the same as a DK'Tronics compatible RAM. In Aleste mapper mode, writing to the mapper changes the RAM for one page. It is not know:* Must you write to #7Fxx in CPC mode to define RAM configuration or can you also use #7Cxx, #7Dxx, #7Exx for same effect* When you write CPC RAM configuration is it mirrored in all mapperregisters?
== Aleste 8bit Printer Port ==