All the other bits read as 0 and don't have any function.
== ASIC/Pre-ASIC and R10/R11 ==
The cursor raster registers R10/R11 act as status registers on Types 3 & 4.
{| class="wikitable sortable"
! R10 - Bit number
! Bit value
! Event
|-
|0
|1
|C0=R0
|-
|1
|0
|C0=R0/2
|-
|2
|0
|C0=R1-1 (if R0>=R1)
|-
|3
|0
|C0=R2
|-
|4
|0
|C0=R2+R3
|-
|5
|0
1
|R3h>0 : C0=0..R0 on the line R3h from Vsync (C4=R7)
R3h=0 : C0=0..R0 over 15 lines from Vsync (C4=R7)
|-
|6
|1
|Always 1
|-
|7
|0
0
|C0=0..R0-1 : VMA.Lsb=0xFF
C0=R0 : VMA'.Lsb=0x00 (same cond if C0=R0=0)
|}
{| class="wikitable sortable"
! R11 - Bit number
! Bit value
! Event
|-
|0
|0
|C4=R4 and C9=R9 and C0=R0 : Last char of screen
|-
|1
|0
|C4=R6-1 and C9=R9 and C0=R0 : Last char displayed
|-
|2
|0
|C4=R7-1 and C9=R9 and C0=R0 : Last char before Vsync
|-
|3
|0/1
|Timer 16 CRTC frames
|-
|4
|1
|Always 1
|-
|5
|0
|C9=R9 : C0=0 to R0
|-
|6
|0
|Always 0
|-
|7
|1
|(C9=R9 and C0=R0) or (C9=0 and C0=0 to R0-1)
|}
== CRTC Timing Diagram ==