CRTC pin CUDISP is not connected to the Gate Array, so it has no effect on a barebone CPC or Plus machine.
However, this signal is present on provided to the expansion port. And it is used by the [[PlayCity]] and [[Play2CPC]] expansions.
== DISPTMG ==
CRTCs 1 and 2 have a fixed VSYNC width value of 16. VSYNC width can be configured with Register 3 on CRTCs 0, 3 and 4.
The bit 0 of port B of the PPI changes to 1 as soon as the VSYNC signal is produced by the CRTC.
== The 6845 Registers ==
|1||0||-||-
|-
|1||1||Read from selected internal 6845 register||Read only Only
|-
|}
|1||0||Read Status Register||Read Only
|-
|1||1||Read from selected internal 6845 register||Read only Only
|}
|1||0||-||-
|-
|1||1||Read from selected internal 6845 register||Read only Only
|-
|}
|1||0||Read from selected internal 6845 register||Read Only
|-
|1||1||Read from selected internal 6845 register||Read only Only
|-
|}
'''Notes'''
* On type 0 The CRTC is not connected to the CPU's RD and 1WR pins, so the CRTC is not aware of the CPU bus I/O direction. Therefore, if a Write Only register is read frominstruction is used on a write register of the CRTC, "0" then a data is returnedsent to the CRTC.
* CRTC type 4 On types 0 and 1, if a Write Only register is the same as read from, "0" is returned. * CRTC type types 3. The registers also repeat as they do on and 4 are identical in every way, except for the type 3unlocking mechanism, split-screen and 8-bit printer port functionalities specific to the ASIC.
* See the document "Extra CPC Plus Hardware Information" for more details.
All the other bits read as 0 and don't have any function.
=== R10/R11 on ASIC/Pre-ASIC and R10/R11 ===
The cursor raster registers R10/R11 act as status registers when read on Types 3 & 4. They behave as normal cursor raster registers upon write.
|(C9=R9 and C0=R0) or (C9=0 and C0=0 to R0-1)
|}
=== Reading from CRTC registers on ASIC/Pre-ASIC ===
On CRTC Types 3 and 4, only the 3 least significant bits of the selected register number are considered to read a register according to the following table:
{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''Nb'''||'''Register'''||'''Definition'''
|-
|0||R16||Light Pen Address (High)
|-
|1||R17||Light Pen Address (Low)
|-
|2||R10||Cursor Start Raster
|-
|3||R11||Cursor End Raster
|-
|4||R12||Display Start Address (High)
|-
|5||R13||Display Start Address (Low)
|-
|6||R14||Cursor Address (High)
|-
|7||R15||Cursor Address (Low)
|}
Therefore, as an example, reading register 4 will give the same result as reading register 12 or 20.
<br>
* [http://www.grimware.org/doku.php/documentations/devices/crtc CRTC documentation from Grimware]
* [http://quasar.cpcscene.net/doku.php?id=assem:crtc Quasar CRTC documentation (in french)]
* [https[Media://cpcrulez.fr/coding_CRTC-Paradox.htm Dossier CRTC Rupture(Gozeur/Paradox).pdf]]
* [[Media:Dossier CRTC(Ramlaid Mortel).pdf]] Les entrailles du CRTC
* [https://thecheshirec.at/tag/crtc6845/ Leçons CRTC (CheshireCat)]